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TMS320C6745 DSP Trainer Kit

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The C6745 dsp development baord is a Low-power digital signal processor based on C674x DSP core. It consumes significantly lower power than other members of the TMS320C6000™ Platform of DSP’s. The C6745/6747 DSP core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 32KB direct mapped cache and the Level 1 data cache (L1D) is a 32KB 2-way set-associative cache. The Level 2 program cache (L2P) consists of a 256KB memory space that is shared between program and data space. L2 also has a 1024KB ROM. The C67xx Evaluation Board is highly integrated, high-performance solution for demanding control applications and is the first 32-bit 150 MIPS DSP.
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