# ADC of sine wave using msp430

30 Jan 15

I am converting 50 Hz analog sine wave into digital using msp4430g2231. and sending sine wave value to PC using uart. code is here. i am getting value. but it is not exact sine wave. can you help me?

31 Jan 15

Rushin ,

1. Attach your c code in next post.

2. how do u verifying that sine digital value ?

01 Feb 15

my C code is here

01 Feb 15

c code is here

01 Feb 15

i am reading text file in matlab. and then plot wave

02 Feb 15

Rushin,

__delay_cycles(500000);
__delay_cycles(500000);
__delay_cycles(500000);
v=v/3;
v=v+6;

Few questions :

1. Why you are using these delay_cycles(500000) ?
4. 50hz sine amplitude ?
5. adc clock range and msp430cpu clock range ?
6. why you doing v=v/3 and v=v+6 ?

02 Feb 15

I put delay cycles randomly. delay is for watching value in terminal. adc bit resolution is 10 bit. 50 hz sine amplitude is 4v peak peak. i am using SMCLK 1 MHZ. it can vary as 16 MHz

02 Feb 15

first i use this code for voltage divider circuit. at that time i am getting error for 0.6 v . so i add last v/3 step to reduce error

02 Feb 15

Rushin,

avoid all the delays in c code, dont do any calculation(like v/3, v+6 etc) on adc result just simply save the adc result and give the sample output in text file.

04 Feb 15

i did that. but i got sine wave like that. it is not exact sine wave

04 Feb 15

Rushin,

This is not exact sine wave., could you share adc result in text file and also tell clearly about your clock frequency and adc clock frequency[like MCLK, SMCLK, ACLK].

completely check about Unified Clock System register which you used in c code.

05 Feb 15

My SMCLK is 1 MHZ. i have not used Unified Clock System register. text file is here

05 Feb 15

Rushin,

MCLK is used by the CPU and system
ACLK is software selectable by individual peripheral modules
SMCLK is software selectable by individual peripheral modules

ADC10SSELx - ADC clock source select , please be care here which clock you choosen , and also check the clock divisor.

3. if you choosen the SMCLK for ADC then try to reduce the clock and check the result.

05 Feb 15

I use this statement
BCSCTL1 = CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
so my MCLK may be 1Mhz.
i am using function generator. i am setting offset zero. in above statement when i change 8Mhz instead of 1MHz . i am getting error.

05 Feb 15

when i write this statement, I got error ADC10DIV8 identifier is undefined. ADC10SSEL3 is undefined