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User Manual for Spartan3an Project Kit

User Manual Spartan3AN Stick Board
Learning Xilinx FPGA and ISE Development Software Basics

The Spartan3AN Stick Board provides a powerful, self-contained development platform for designs targeting the new Spartan-3AN FPGA from Xilinx. It features a 50K gate Spartan-3AN, on-board I/O devices, and 1Mb Internal flash memory, making it the perfect platform to experiment with any new design.

Components placement
spartan-3an-stick-board

Figure 1. Spartan3AN Stick Board Components placement top view

Block Diagram
DIP-switches-connections-from-Spartan3A-Stick-Board-FPGA-Kit

Figure 2. Xilinx Spartan3AN Stick Board Block Diagram



Power Distribution
Voltage Regulators

There are multiple voltages supplied on the Spartan3AN Stick Board : the 5v feed to board by USB port, 3.3V and 1.2V regulators are available .The 3.3V regulator feeds all the VCCO voltage supply inputs to the FPGA’s I/O banks and powers most of the components on the board. The 3.3V regulator supplies power to the FPGA’s VCCAUX supply inputs. The VCCAUX voltage input supplies power to Digital Clock Managers (DCMs) within the FPGA and supplies some of the I/O structures. In specific, all of the FPGA’s dedicated configuration pins, such as DONE, PROG_B, CCLK, and the FPGA’s JTAG pins, are powered by VCCAUX. The FPGA configuration interface on the board is powered by 3.3V. Finally, the 1.2V regulator supplies power to the FPGA’s VCCINT voltage inputs, which power the FPGA’s core logic. Place the jumper at J1 to enable the power supply.

Hardware setting:

Place the jumper at J1 for enable the power which is indicated by LED (D2).

DIP-switches-connections-from-Spartan3A-Stick-Board-FPGA-Kit

Figure 3. Power Supply



On-board Peripherals

Spartan3AN Stick Board comes with many interfacing options

  • 8 Nos. of LED’S
  • 8-Nos. of DIP switches (Digital Inputs)
  • 2-Nos. of Push Button (Digital Inputs)
  • Reset switch
  • USB-UART Port
  • 2-Channel UART
Light Emitting Diode

Light Emitting Diode are the most commonly used components, usually for displaying pin’s digital states. The Spatran3AN stick board has four led’s located above the crystal oscillator of FPGA. The cathode of each LED connects to ground via a 220 ohm Ω resistor.

LED-of-Spartan3AN-Stick-Board-FPGA-Kit

Figure 4. LED’S of Spartan3AN Stick Board FPGA Kit



Table 1. LED’S connections to the FPGA pins


LED

PIN NO

D3

P59

D4

P60

D5

P62

D6

P63

D7

P64

D8

P67

D9

P68

D10

P69

 
Example Code

To see the demo result, click  inside LED code folder of the CD.

USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA
Hardware Settings

Place Jumper at J5 to enable LED.

Digital Inputs DIP Switch

The Spartan3AN Stick Board has four DIP switches, indicated as in Figure 5. The switches connect to an associated FPGA pin, as shown in Table 2Error! Reference source not found.. A detailed schematic appears in Figure 5.

USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA

Figure 5. DIP switches connections from Spartan3AN Stick Board FPGA Kit



SWITCH(SW3)

PIN NO

1

P33

2

P35

3

P45

4

P53

5

P80

6

P97

7

P123

8

P140

 

When in the UP or ON position, a switch connects the FPGA pin to VCCO, a logic High. When DOWN or in the OFF position, the switch connects the FPGA pin to ground, a logic Low. The switches typically exhibit about 2 ms of mechanical bounce and there is no active debouncing circuitry, although such circuitry could easily be added to the FPGA design programmed on the board. A 10KΩ series resistor provides nominal input protection.

Example Code

To see the demo result, click  inside Digital Input Switch folder of the CD.

USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA
Push Buttons

The Spartan3AN Stick Board FPGA Kit has two contact push button switches, indicated as in Figure 6.

push-button-interface-from-spartan3an-stick-board-fpga-kit

Figure 6. Push Button interface from Spartan3AN Stick Board



Table 3. FPGA Connections to Push Button


Switch

Sw2

Sw4

FPGA pin

P43

P44

 

Example Code

To see the demo result, click  inside Push Button folder of the CD.

USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA
Reset Button

This is hardware reset Button for FPGA. When press the reset button , the program will be erased as well as the FPGA initialized .


USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA

Figure 7. Push Button For Reset from Spartan3AN Stick Board



USB/JTAG Programming/Debugging Ports

The Spartan3AN Stick Board kit includes a USB/ JTAG programming and debugging chain. Additionally, there are two possible way for programming download and debugging through USB as well as JTAG header. a mini USB cable, which is used to download the program from PC into FPGA. For this purpose the cable directly connected to USB port of the PC and another way is the JTAG cable connects directly to the parallel port of a PC and to a standard 6-pin JTAG programming header in the kit that can program a devices that have a JTAG voltage of 1.8v or greater.

DIP-switches-connections-from-Spartan3A-Stick-Board-FPGA-Kit

Figure 8.USB/ JTAG connection with Spartan3AN Stick Board Kit

USB/UART

The FTDI2232 channel 2 is used for the UART communication. The USB port can be used as USB-UART serial communication. The baud rate of UART communication which is 300 to 3Mbaud.

USB/ UART connection with Spartan3AN Stick Board FPGA

Figure 9.USB/ UART connection with Spartan3AN Stick Board FPGA



Table 4. FPGA Connections to USB Port


Signal

RXD

TXD

FPGA pin

P76

P75

 
Example Code

To see the demo result, click USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA inside USB/UART folder of the CD.

UART/RS 232:

The UART (universal asynchronous receiver/transmitter) is a serial protocol with separate transmits and receives lines, and can be used for full duplex communication. The Spartan3AN Stick Board has 2 Serial Port. RS-232 serial communication is performed through a Max3232 IC. The UART is one of the most common ways of exchanging data between the FPGA and peripheral components. In order to enable this communication, it is necessary to establish a connection between RX and TX lines on PTB connector and the same pins on the target FPGA. Since RS-232 communication voltage levels are different than FPGA logic levels, it is necessary to use a RS-232 Transceiver circuit MAX3232.

UART-connection-with-Spartan3AN-Stick-Board-FPGA

Figure 10. UART connection with Spartan3AN Stick Board FPGA



PTB-Connector-Details



PTB Connector Details

Table 5. PIN Details of PTB Connector


PIN NO

FUNCTION

1

TX0

2

RX0

3

GND

4

TX1

5

RX1

 

Table 6. FPGA Connections to PTB Connector

Signal

RXD

TXD
FPGA pin

UART 1

P55

P54

FPGA pin

UART 2

P78

P77

 
Example Code

To see the demo result, click USB-UART-connection-with-Spartan3AN-Stick-Board-FPGA inside UART/RS 232 folder of the CD.

Clock Source

The Spartan3AN Stick Board FPGA Kit has dedicated 50 MHz series clock oscillator source. Figure 12 provides a detailed schematic for the clock sources.

Table 7. Clock Oscillator Sources


Connector Name

Signals

FPGA PIN

Clock

DATA

P127

 

Clock-source-connections-from-Spartan3AN--Stick-Board

Figure 12. Clock source connections from Spartan3AN Stick Board

 

Driver Installation

Connect Spartan3AN Stick Board and open device manager.

Check cable detected as USB serial converter A and USB Serial Converter B as shown in figure.

usb-serial-converter-a-and-usb-serial-converter-b


Otherwise download driver from the following link


http://www.ftdichip.com/Drivers/VCP.htm


And install the driver.


Programming on FPGA:

  • The Bit file needs to be created with Xilinx ISE Software.
  • After Generating Program file, Open Pantech FPGA programmer tool to download the code on FPGA kit through the MINI USB cable.
pantech-fpga-programmer
  • Browse Bit file from Project directory.
  • Click Program to download in to FPGA.

To store data in Spartan3an internal FLASH memory.

  • Open command prompt
  • Go to FPGA Programmer Directory as Shown in figure.
fpga-programmer-directory
  • Place the generated bit file(eg: sw_led.bit) in the Fpga_programmer directory.
  • Now type the following command and enter as shown in figure xc3sprog –c ftdi –Ixc3s50an.bit sw_led.bit


xc3s50an-c-ftdi-Ixc3s50an.bit-sw-led-bit



  • Now program gets downloaded in to internal FLASH Memory
  • To erase the bit file, Type the following command and enter as shown in figure xc3sprog –c ftdi –Ixc3s50an.bit -e
xc3s50an-c-ftdi-Ixc3s50an-bit-e
Spartan 3A

General Description

The Spartan®-3AN FPGA family combines the best attributes of a leading edge, low cost FPGA with non volatile technology across a broad range of densities. The family combines all the features of the Spartan-3A FPGA family plus leading technology in-system Flash memory for configuration and nonvolatile data storage.The Spartan-3AN FPGAs are part of the Extended Spartan-3Afamily, which also includes the Spartan-3A FPGAs and the higher density Spartan-3A DSP FPGAs. The Spartan-3AN FPGA familyis excellent for space-constrained applications such as blade servers, medical devices, automotive infotainment, telematics, GPS, and other small consumer products. Combining FPGA and Flash technology minimizes chip count, PCB traces and overallsize while increasing system reliability. The Spartan-3AN FPGA internal configuration interface iscompletely self-contained, increasing design security. The family maintains full support for external configuration. The Spartan-3ANFPGA is the world’s first nonvolatile FPGA with MultiBoot ,supporting two or more configuration files in one device, allowing alternative configurations for field upgrades, test modes, or multiple system configurations.


Package Marking

The Spartan-3AN family XC3S50AN is a Thin _quad packages. The “4C” is a Speed Grade/Temperature Range.

Extended Spatran 3AN Device TQG package marking

Figure 13. Extended Spatran 3AN Device TQG package marking

Ordering Information

The Extended Spartan-3AN family is available in both standard and Pb-free packaging options for all options of theSpartan-3A devices and the Spartan-3A DSP devices.The Pb-free packages include a “G” character in the ordering code.


Ordering information For Spartan 3AN

Figure 14. Ordering information For Spartan 3AN



Architectural Overview

The Spartan-3AN FPGA architecture is compatible with that of the Spartan-3A FPGA. The architecture consists of five undamental programmable functional elements. Configurable Logic Blocks (CLBs) contain flexible Look-Up Tables (LUTs) that implement logic plus storage elements used as flip-flops or latches.• Input/Output Blocks (IOBs) control the flow of data between the I/O pins and the internal logic of the device. IOBs support bidirectional data flow plus3-state operation. They support a variety of signal standards, including several high-performance differential standards. Double Data-Rate (DDR)registers are included. Block RAM provides data storage in the form of18-Kbit dual-port blocks. Multiplier Blocks accept two 18-bit binary numbers as inputs and calculate the product. Digital Clock Manager (DCM) Blocks provide self-calibrating, fully digital solutions for distributing, delaying, multiplying, dividing, and phase-shifting clock signals. These elements are organized as shown in Figure 15. A dual ring of staggered IOBs surrounds a regular array of CLBs. Each device has two columns of block RAM except for theXC3S50AN, which has one column. Each RAM column consists of several 18-Kbit RAM blocks. Each block RAM is associated with a dedicated multiplier. The DCMs are positioned in the center with two at the top and two at the bottom of the device. The XC3S50AN has DCMs only at the top, while the XC3S700AN and XC3S1400AN add two DCMs in the middle of the two columns of block RAM and multipliers. The Spartan-3AN FPGA features a rich network of traces that interconnect all five functional elements, transmitting signals among them. Each functional element has an associated switch matrix that permits multiple connections to the routing.

Block Diagram for Spartan 3AN

Figure 15.Block Diagram for Spartan 3AN



Dedicated Pins

The complete pin-out table of the Spartan 3AN is described in the following table.


Table 8. Pin out table of Spartan3: XC3S50AN TQG 144


Pin

Function

73

DONE

144

PROGRAM_B

107

TD0

109

TCK

1

TMS

2

TDI

 

Table 9. Supply pins of Spartan3: XC3S50AN TQG144


GND

9,17,26,34,56,65,81,89,100,106,118,128,137

VCCO(3.3v)

14,23,40,61,95,88,136,119

VCCINT(1.2v)

22,52,94,122

VCCAUX(3.3v)

36,66,108,133

 

Table 10. Pin description of Spartan3: XC3S50AN TQG144


DONE

High when programming of FPGA was successful

TD0,TDI

TMS,TCK

JTAG signal