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How to Interface Relay with FPGA/CPLD UDB

Relay

A relay is an electrically operated switch. It use an electromagnet to operate a switching mechanism mechanically

Interfacing Relay with FPGA/CPLD UDB

The Universal Development board has external 5v Relay interfacing, indicated as in Figure. ULN2803 is used as a driver for FPGA I/O lines, drivers output connected to relay modules. PTB connector provided for external power supply if needed. Signal LEDs for each relay help you to easy determine current relay state.

 

Pin Assignment with FPGA/CPLD UDB



Signals

PIN NAME

Relay1

Rly1

Relay2

Rly2

 



Note: Please refer User Manual for Pin number of FPGA/CPLD .

Circuit Diagram to Interface Relay with FPGA/CPLD






VHDL Program for Relay using FPGA/CPLD

***************************************************************************************

Title : Program for Relay

***************************************************************************************

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity relay is
port ( clock : in std_logic;
       a     : out std_logic
		 );
end relay;

architecture Behavioral of relay is
begin
process(clock)
variable i : integer := 0;
begin
if clock'event and clock = '1' then
if i <= 50000000 then
i := i + 1;
a <= '1';
elsif i > 50000000 and i < 100000000 then
i := i + 1;
a <= '0';
elsif i = 100000000 then
i := 0;  
end if;
end if;
end process;
end Behavioral;

User Constraint File

NET "clock"  LOC = "p181"  ;
NET "relay(0)"  LOC = "p125"  ;
NET "relay(1)"  LOC = "p124"  ;