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DIP switch and Push Button interfacing with Spartan3 FPGA Image Processing Board

DIP switch and Push Button interfacing with Spartan3 FPGA Image Processing Board

DIP switch

 DIP switches are most common used in electronic circuits for digital input of ON/OFF states. They allow control over current flow in a circuit.

Push Buttons

Push-button switches are the classic momentary switch. Typically these switches have a really nice, tactile feedback when you press them. 

 Schematic to interface Slide Switch and Push Button with Spartan3 FPGA Image Processing Board

                                                                         Schematic to interface Slide Switch and Push Button with Spartan3 FPGA Image Processing Board

 

                           Schematic to interface Slide Switch and Push Button with Spartan3 FPGA Image Processing Board

                                                           Schematic to interface Slide Switch and Push Button with Spartan3 FPGA Image Processing Board

Slide Switch and Push Button Placement in Spartan3 FPGA Image Processing Board

Interfacing Slide Switch and Push Button with Spartan3 FPGA Image Processing Board

Push Button interface is straight forward. One end of Push Button connected to FPGA and another end connected to ground. Slide switch interface to FPGA is Pulled High by default at open end and another end is connected to ground which act as OFF State.

VHDL Code for Slide Switch Interfacing with Spartan3 FPGA Image Processing Board

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

 

entity sw_led is

    Port ( sw : in  STD_LOGIC_VECTOR (7 downto 0);

           led : out  STD_LOGIC_VECTOR (7 downto 0));

end sw_led;

 

architecture Behavioral of sw_led is

 

begin

 

led <= sw;

 

end Behavioral;

User Constraint File

NET "sw(0)"  LOC = "p99"  ;

NET "sw(1)"  LOC = "p100"  ;

NET "sw(2)"  LOC = "p102"  ;

NET "sw(3)"  LOC = "p103"  ;

NET "sw(4)"  LOC = "p104"  ;

NET "sw(5)"  LOC = "p105"  ;

NET "sw(6)"  LOC = "p107"  ;

NET "sw(7)"  LOC = "p108"  ;

 

NET "led(0)"  LOC = "p82"  ;

NET "led(1)"  LOC = "p83"  ;

NET "led(2)"  LOC = "p84"  ;

NET "led(3)"  LOC = "p85"  ;

NET "led(4)"  LOC = "p86"  ;

NET "led(5)"  LOC = "p87"  ;

NET "led(6)"  LOC = "p89"  ;

NET "led(7)"  LOC = "p90"  ;

VHDL Code for Push Button Interfacing with Spartan3 FPGA Image Processing Board

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

 

entity push_sw is

    Port (sw1,sw2,sw3,sw4,sw5 : in  STD_LOGIC;

           led1,led2,led3,led4,led5: out  STD_LOGIC);

end push_sw;

 

architecture Behavioral of push_sw is

begin

led5<= sw5;

led4<= sw4;

led3<= sw3;

led2<= sw2;

led1<= sw1;

end Behavioral;

User Constraint File

NET "led1" LOC = P82;

NET "led2" LOC = P83;

NET "led3" LOC = p84;

NET "led4" LOC = P85;

NET "sw1" LOC = P68 | PULLDOWN;

NET "sw2" LOC = P69 | PULLDOWN;

NET "sw3" LOC = P70 | PULLDOWN;

NET "sw4" LOC = P98 | PULLDOWN;