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Abstract

PIR motion detectors are perhaps the most frequently used for security device. Passive IR motion detectors are usually designed to provide an indication to an alarm panel in response to detecting IR that is indicative of motion of the object. The alarm panel is responsive to receipt of the breach indication to cause an alarm condition to occur. When a person or motor vehicle enters a monitored area, PIR motion detectors are commonly used in conjunction with indoor or outdoor to turn on a light in response to a person moving in the field of view monitored by the motion detector. Someone enters secured places, immediately it will send sms for the Corresponding people. The people can understood something happens in host section. At the Same time camera keep on capturing images at the host place and saved into the computer. When the owner in remote place, they got messages to the host section by sms, they log into the host section computer through GPRS and WAP enable mobile, they can view all information of the host section images by mobile phone.

A motion detector of an alarm system has a microwave sensor and a passive infrared sensor, and includes signal processing logic for initiating an anti-masking evaluation upon detection of certain conditions. The detector then samples the sensor signals and compares the signals to a series of possible outcomes. Some of the possible outcomes represent the masking conditions, while others represent normal conditions. A match with masking conditions results in an alarm signal being generated.

Tool required

Software:

⇛Xilinx ISE 10.1i or above

Language:

⇛VHDL

Hardware:

Spartan3an Project Kit.

⇛PIR Sensor

⇛GSM Modem

⇛Stepper Motor

Block Diagram for FPGA Implementation of PIR Based Security alert System using Spartan3an FPGA Starter Kit



Block_Dgm_PIR_Based_alert

Introduction:

When a person enters a monitored area, the target is monitored by sensors which include PIR sensors. These are used to detect motion of the person. Passive infrared sensors (PIR) are electronic devices which are used in some security alarm systems to detect motion of an infrared emitting source, usually a human body.

The pyroelectric sensor is made of a crystalline material that generates a surface electric charge when exposed to heat in the form of infrared radiation. Someone enters secured places, Spartan3an FPGA Starter Kit immediately send SMS for the corresponding people through GSM modem.

The FPGA is more advantageous compare to other models due to its re-configurability and its parallel processing. The GSM modem is connected to the FPGA through serial cable. The people can understood something happens in host section, when they receive message. UART MAX232 stands for Universal Asynchronous Receiver/Transmitter   which can be used to receive data from the server through the serial cable.

If user response is received in default time, the system will be in user control mode, where user can establish a remote connection to observe the target area and make relevant control with the help of rotating unit called stepper motor. According to the instructions given through the mobile, then the corresponding operations performed by stepper motor will be rotated either in clockwise or in anti-clockwise. At the same time camera keep on capturing images at the host place and saved into the computer.

PIR Connection

Most PIR modules have a 3-pin connection at the side or bottom. The pin-out may vary between modules so triple-check the pin-out! It's often silk screened on right next to the connection. One pin will be ground, another will be signal and the final one will be power. Power is usually 3-5VDC input but may be as high as 12V. Sometimes larger modules don’t have direct output and instead just operate a relay in which case there is ground, power and the two switch connections. The output of some relays may be 'open collector' - that means it requires a pull-up resistor.

An easy way of prototyping with PIR sensors is to connect it to a breadboard since the connection port is 0.1" spacing. Some PIRs come with header on them already; the ones from Ad fruit don't as usually the header is useless to plug into a breadboard. By soldering in 0.1" right angle header, a PIR is easily installed into a breadboard. PIR sensors are rather generic and for the most part vary only in price and sensitivity.



PIR_Based_alert_conn

PIR Based Security alert System using Spartan3an FPGA Evaluation Kit



PIR_Based_alert_SP3

Flow chart



flow_char_PIR_Based_alert

Source Code

VHDL Code for PIR based Security Alert System using Spartan3an FPGA Starter Kit

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity pir is
port(
clock: in std_logic; din   : in  std_logic;
 op1 : out std_logic ;
op2 : out std_logic ;
op3 : out std_logic ;
op4 : out std_logic ;
buz : out std_logic:='0';
pir:in std_logic;
led:out std_logic:='0';
txd: out std_logic);
end entity pir;

architecture rtl of test is type state1 is (ready1,b01,b02,b03);
signal ps1 : state1 := ready1;
type state is (ready,b0);
signal ps : state := ready;
signal start,stop : std_logic;
signal store : std_logic_vector(7 downto 0) := "10101010"; 
constant system_speed: natural := 50e6;

signal baudrate_clock, second_clock, old_second_clock: std_logic;
signal bit_counter: unsigned(3 downto 0) := x"9";
signal shift_register: unsigned(9 downto 0) := (others => '0');
signal char_index: natural range 0 to 99;
component clock_generator 
generic(clock_in_speed, clock_out_speed: integer);
port(
clock_in: in std_logic;
clock_out: out std_logic);
end component;

begin
baudrate_generator: clock_generator
generic map(clock_in_speed => system_speed, clock_out_speed => 9600)
port map(
clock_in => clock,
clock_out => baudrate_clock);

second_generator: clock_generator
generic map(clock_in_speed => system_speed, clock_out_speed => 1)
port map(
clock_in => clock,
clock_out => second_clock);

send: process(baudrate_clock)
begin

if baudrate_clock'event and baudrate_clock = '1' then
led<=pir;
if pir='1' then
txd <= '1';
if bit_counter = 9 then
if second_clock /= old_second_clock then
old_second_clock <= second_clock;
if second_clock = '1' then
bit_counter <= x"0";
char_index <= char_index + 1;
case char_index is
when 0 =>
shift_register <= b"1" & x"41" & b"0";--A
when 1 =>
shift_register <= b"1" & x"54" & b"0";--T
when 2 =>
shift_register <= b"1" & x"2B" & b"0";--+
when 3 =>
shift_register <= b"1" & x"43" & b"0";--C
when 4 =>
shift_register <= b"1" & x"4D" & b"0";--M
when 5 =>
shift_register <= b"1" & x"47" & b"0";--G
when 6 =>
shift_register <= b"1" & x"53" & b"0";--S
when 7 =>
shift_register <= b"1" & x"3D" & b"0";--=
when 8 =>
shift_register <= b"1" & x"22" & b"0";--"
when 9 =>
shift_register <= b"1" & x"39" & b"0";--9
when 10 =>
shift_register <= b"1" & x"30" & b"0";--0
when 11 =>
shift_register <= b"1" & x"30" & b"0";--0
when 12 =>
shift_register <= b"1" & x"30" & b"0";--0
when 13 =>
shift_register <= b"1" & x"30" & b"0";--0
when 14 =>
shift_register <= b"1" & x"30" & b"0";--0
when 15 =>
shift_register <= b"1" & x"30" & b"0";--0
when 16 =>
shift_register <= b"1" & x"30" & b"0";--0
when 17 =>
shift_register <= b"1" & x"30" & b"0";--0
when 18 =>
shift_register <= b"1" & x"30" & b"0";--0
when 19 =>
shift_register <= b"1" & x"22" & b"0";--"
when 20 =>
shift_register <= b"1" & x"0D" & b"0";--ENTER
when 21 =>
shift_register <= b"1" & x"48" & b"0";--H
when 22 =>
shift_register <= b"1" & x"69" & b"0";--I
when 23 =>
shift_register <= b"1" & x"1A" & b"0";--Ctrl-Z
when others =>
shift_register <= b"1" & x"00" & b"0";
--char_index <= 0;
--when others =>
--char_index <= 0;
end case;
end if;
end if;
else
txd <= shift_register(0);
bit_counter <= bit_counter + 1;
shift_register <= shift_register ror 1;
end if;
end if;
end if;
end process; process(clock)
variable i : integer := 0 ;
begin
if clock'event and clock = '1' then
if ps = ready then
start <= din;
end if;
if start = '0' then
ps <= b0;
elsif start = '1' then
ps <= ready;
end if;
------------------------------------------1
if ps = b0 then
i := i + 1;
if i = 2600 then
start <= din;
end if;
if i = 7800 then
store(0) <= din;
end if;
if i = 13000 then
store(1) <= din;
end if;
if i = 18200 then
store(2) <= din;
end if;
if i = 23400 then
store(3) <= din;
end if;
if i = 28600 then
store(4) <= din;
end if;
if i = 33800 then
store(5) <= din;
end if;
if i = 39000 then
store(6) <= din;
end if;
if i = 44200 then
store(7) <= din;
end if;
if i = 49400 then
stop <= din;
end if;
if i = 54600 then
i := 0 ;
ps <= ready ;
end if;
end if;end if;
end  process;

process(clock,store)
variable i: integer := 0 ;
begin
if clock'event and clock = '1' then
if store = x"31" then
if ps1 = ready1 then
i := i + 1;
if i = 800000 then
op1 <= '0' ;
op2 <= '0' ;
op3 <= '0' ;
op4 <= '1' ;
buz<='0';
ps1 <= b01;
i  := 0;
end if;
end if;
if ps1 = b01 then
i := i + 1;
if i = 800000 then
op1 <= '0' ;
op2 <= '0' ;
op3 <= '1' ;
op4 <= '0' ;
ps1 <= b02;
i  := 0;
end if;
end if;
if ps1 = b02 then
i := i + 1;
if i = 800000 then
op1 <= '0' ;
op2 <= '1' ;
op3 <= '0' ;
op4 <= '0' ;
ps1 <= b03;
i  := 0;
end if;
end if;
if ps1 = b03 then
i := i + 1;
if i = 800000 then
op1 <= '1' ;
op2 <= '0' ;
op3 <= '0' ;
op4 <= '0' ;
ps1 <= ready1;
i  := 0;
end if;
end if;

elsif store = x"32" then
if ps1 = ready1 then
i := i + 1;
if i = 800000 then
op1 <= '1' ;
op2 <= '0' ;
op3 <= '0' ;
op4 <= '0' ;
buz<='0';
ps1 <= b01;
i  := 0;
end if;
end if;
if ps1 = b01 then
i := i + 1;
if i = 800000 then
op1 <= '0' ;
op2 <= '1' ;
op3 <= '0' ;
op4 <= '0' ;
ps1 <= b02;
i  := 0;
end if;
end if;
if ps1 = b02 then
i := i + 1;
if i = 800000 then
op1 <= '0' ;
op2 <= '0' ;
op3 <= '1' ;
op4 <= '0' ;
ps1 <= b03;
i  := 0;
end if;
end if;
if ps1 = b03 then
i := i + 1;
if i = 800000 then
op1 <= '0' ;
op2 <= '0' ;
op3 <= '0' ;
op4 <= '1' ;
ps1 <= ready1;
i  := 0;
end if;
end if;
elsif store = x"33" then

if ps1 = ready1 then
i := i + 1;
if i = 600000 then
op1 <= '0' ;
op2 <= '0' ;
op3 <= '0' ;
op4 <= '1' ;
buz<='1';
ps1 <= b01;
i  := 0;
end if;
end if;
if ps1 = b01 then
i := i + 1;
if i = 600000 then
op1 <= '0' ;
op2 <= '0' ;
op3 <= '1' ;
op4 <= '0' ;
buz<='1';
ps1 <= b02;
i  := 0;
end if;
end if;
if ps1 = b02 then
i := i + 1;
if i = 600000 then
op1 <= '0' ;
op2 <= '1' ;
op3 <= '0' ;
op4 <= '0' ;
buz<='1';
ps1 <= b03;
i  := 0;
end if;
end if;
if ps1 = b03 then
i := i + 1;
if i = 600000 then
op1 <= '1' ;
op2 <= '0' ;
op3 <= '0' ;
op4 <= '0' ;
buz<='1';
ps1 <= ready1;
i  := 0;
end if;
end if;
end if;
end if;
end process;

end architecture rtl;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity clock_generator is
generic(clock_in_speed, clock_out_speed: integer);
port(
clock_in: in std_logic;
clock_out: out std_logic);
end entity clock_generator;

architecture rtl of clock_generator is

function num_bits(n: natural) return natural is
begin
if n > 0 then
return 1 + num_bits(n / 2);
else
return 1;
end if;
end num_bits;

constant max_counter: natural := clock_in_speed / clock_out_speed / 2;
constant counter_bits: natural := num_bits(max_counter);

signal counter: unsigned(counter_bits - 1 downto 0) := (others => '0');
signal clock_signal: std_logic;

begin
update_counter: process(clock_in)
begin
if clock_in'event and clock_in = '1' then
if counter = max_counter then
counter <= to_unsigned(0, counter_bits);
clock_signal <= not clock_signal;
else
counter <= counter + 1;
end if;
end if;
end process;

clock_out <= clock_signal;
end architecture rtl;

Conclusion

We implemented a novel configuration for the sensors and a set of features that can be easily calculated by typical wireless sensor nodes based on Spartan3an FPGA Starter Kit. The technique proposed allows high reactivity. Results of the detection are available within few hundreds of milliseconds after the event is ended. These solutions can improve cost, performance, and productivity for many video and imaging applications.