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Abstract

With the recent advent of hardware description languages (e.g., Verilog or VHDL) and digital implementation for field-programmable gate arrays (FPGAs), substantial academic digital design projects become practicable. In the present paper, the design of a digital binary-phase-shift-keying (BPSK) modulator and detector is described. The project details the design of the components (e.g., multiplexer, FIR low pass filter and comparator) and the simulation of the entire system. The entire system was designed using the Matlab’s simulink program and system generator block set and implemented on a Spartan3 FPGA Image Processing Kit. The steps taken to simulate the modulation blocks are shown.

Demonstration Video

 

Tool required

Software:

  • Xilinx System Generator,Matlab Symlink

Language:

  • VHDL

Hardware:

  • Spartan6 FPGA Project kit



Block Diagram for BPSK Implementation on Xilinx System Generator using Spartan3 FPGA Image Processing Kit

 

BPSK modulator



blg_BPSK_modulator_1

BPSK modulator output



blg_BPSK_modulator_out_2

BPSK modulator using system generator



blg_BPSK_modulator_sys_3

Introduction:

Digital modulation is the process by which digital symbols are transmitted into waveforms that are compatible with the characteristics of the channel. The modulation process converts a baseband signal into a band pass signal compatible with available transmission facilities. At the receiver end, demodulation must be accomplished to recognize the signals. The process of deciding which symbol was transmitted is referred to as a detection process. Typically, the receiver generates a signal that is phase-locked to the carrier. Binary-phase-shift keying (BPSK) does not require but may use a coherent receiver. The coherent receiver is called the correlation receiver because it correlates the received signal composed of the transmitted signal plus noise with a sinusoidal signal that is phase-locked to the transmitted carrier. The purpose of the correlation receiver is to reduce the received symbol to a single point or statistic that is used by the decision circuit to determine which symbol was transmitted (either 0 or 1). In practice, this single point is a fixed voltage. The decision circuit is a voltage comparator (digital number comparator) that is set so that if the input voltage (number) is above a threshold level, the Comparator indicates a “1” is received; if the input voltage (number) is below that level, a received “0” is indicated.

The current project utilizes MATLab simulink language as well as system generator block set for simulation and implementation on Spartan-6 FPGA development board which mainly gives the flexibility for designing, testing and makes the development very easy. This process will help in increasing the design and testing speed of any system within a given time BPSK modulation is the process by which the phase of the carrier is varied in accordance with the modulating signal.Figure1 shows a simplified block diagram of a BPSK modulator. The coded signal enters to a multiplexer that commutes the phase of the carrier signal. Depending on the logical condition of the digital input, the carrier is transferred to the output, either in phase or at 180° outside of phase, with the reference carrier oscillator [2]. The input signal to the detector can be +cos (ωt) or -cos(ωt). The recovery circuit detects and regenerates a carrier signal, as in frequency as in phase with the carrier of the original transmitter. The product detector whose output is the product of the two inputs (the BPSK signal and the recovered carrier). Since the only possible outputs are the signals cos 2(ωt) and –cos2 (ωt), therefore the product detector’s possible outputs will be: cos2 (ωt) = ½ + ½ cos (2ωt), - cos2 (ωt) = - ½ - ½ cos (2ωt),

HARDWARE IMPLEMENTATION

The modulator is implemented on Spartan3 FPGA Image Processing Kit. An FPGA consists on arrangements of several programmable blocks (logical blocks) which are interconnected between themselves with input/output cells by means of vertical and horizontal connection channels.

For the implementation of the BPSK modulator after simulation, a tool offered by Xilinx, JTAG Co-Simulator is used; this block allows the co-simulation of the design in the development board. Information signal, carrier signal with 00 phase shift, carrier signal with 1800 phase shift, Modulated signal



BPSK_hardwareimp

Xlink system genertor Output Image

Xlink system genertor Output Image

 

 

Xlink system genertor Output Image

 

Xlink system genertor Output Image

 

 

Xlink system genertor Output Image

 

 

Xlink system genertor Output Image

Conclusion

In this project, BPSK system with modulator has been designed and tested. The results given by the development board exactly matches with the results obtained from simulation setup. From the above results it may be concluded that the entire result given by the Spartan3 FPGA Image Processing Kit is same as that of the result obtained from the simulation setup.