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How to Interface UART with Blackfin532 DSP Kit


The ADSP-BF533/32/31 processors are enhanced members of the Blackfin processor family that offer significantly higher performance and lower power than previous Blackfin processors while retaining their ease-of-use and code compatibility benefits, processors are completely code and pin-compatible, differing only with respect to their performance and on-chip memory.

The BLACKFIN EVALUATION BOARD is specially designed for developers in dsp field as well as beginners. The BF532 KIT is designed in such way that all the possible features of the DSP will be easily used by everyone. The kit supports in VisualDsp++5.0 and later.


A Universal Asynchronous Receiver/Transmitter is a type of "asynchronous receiver/transmitter", a piece of computer hardware that translates data between parallel and serial forms. UARTs are commonly used in conjunction with communication standards such as EIA, RS-232, RS-422 or RS-485. The universal designation indicates that the data format and transmission speeds are configurable and that the actual electric signaling levels and methods (such as differential signaling etc.) typically are handled by a special driver circuit external to the UART


The ADSP-BF532 processor provides a full-duplex universal asynchronous receiver/transmitter (UART) port, which is fully compatible with PC-standard UARTs. The UART port provides a simplified UART interface to other peripherals or hosts, supporting full-duplex, DMA-supported, asynchronous transfers of serial data. The UART port includes support for 5 data bits to 8 data bits, 1 stop bit or 2 stop bits, and none, even, or odd parity.




1.  For Boot Mode 11 (Boot From SPI FLASH)

  • There should be jumper in “J8“(this is for MISO Pin HIGH at RESET)
  • There should be Jumper in “WP” (this should be there so, that the Utility code Residing in SPI Flash should not overwritten)
  • There should be jumper in the side of “BF532” for connector “SSEL” (This Should there because BF532 need to Boot from SPI FLASH)
  • There should not be any jumper in J1 (BMODE1) and J2(BMODE0)(this Should be there so that the BOOTMODE is “11”)

2.   For Boot Mode 01(Boot from 8-bit/16-bit Flash)

The above settings can be kept or can be removed for this mode..

The Only requirement for this mode there should be jumper in “C” side for BMODE1 (J1) connector and there should not be any jumper for BMODE0 (J2)



Title : Program for UART


#include<cdefBF533.h> //#include <sysreg.h> /*void Init_PLL(void) { volatile int test=0; sysreg_write(reg_SYSCFG, 0x32); //Initialize System Configuration Register *pSIC_IWR = 0x1; *pPLL_CTL = 0x2C00; ssync(); // idle(); } //end #@Init_PLL*/ section ("L1_code") int UART_detectAutobaud(void) { int period = 0; // Activate Loopback mode in order the receive channel is disconnected // from RX pin during autobaud detection. *pUART_MCR = LOOP_ENA; // Setup Timer 2 Controller to do the autobaud detection. Timer captures // duration between two falling edges. It expects a '@' (ASCII 0x40) // character. 8-bit, no parity assumed. // Disable Timer 2 first, in case there was an unexpected history. *pTIMER_DISABLE = TIMDIS2; *pTIMER_STATUS = TRUN2 | TOVL_ERR2 | TIMIL2; // Capture from UART RxD pin. Select period capture from falling edge to // falling edge. Enable IRQ_ENA, but don't enable the interrupt at system // level (SIC). *pTIMER2_CONFIG = TIN_SEL | IRQ_ENA | PERIOD_CNT | WDTH_CAP; // Start the timer and wait until the according interrupt latch bit TIMIL2 // in the TIMER_STATUS register is set. Then, two falling edges on the RxD // pin have been detected. *pTIMER_ENABLE = TIMEN2; // Enable the UART *pUART_GCTL = UCEN; while (!(*pTIMER_STATUS & TIMIL2)) { // wait }; // Disable Timer 2 again *pTIMER_DISABLE = TIMDIS2; *pTIMER_STATUS = TRUN2 | TOVL_ERR2 | TIMIL2; // Save period value period = *pTIMER2_PERIOD; // In order to support also half-duplex connections, we need to delay any // transmission, in order the sent character does not overlap the autobaud // pattern. // Use Timer 2 to perform this delay. Note that the Period Register still // contains the proper value and the Width Register is not used. *pTIMER2_CONFIG = OUT_DIS | IRQ_ENA | PERIOD_CNT | PWM_OUT; *pTIMER_ENABLE = TIMEN2; while (!(*pTIMER_STATUS & TIMIL2)) { // wait }; // Disable Timer 2 again *pTIMER_DISABLE = TIMDIS2; *pTIMER_STATUS = TRUN2 | TOVL_ERR2 | TIMIL2; // Deactive Loopback mode again *pUART_MCR = 0; // done ! return period; } section ("L1_code") void UART_putc(char c) { while (!(*pUART_LSR & THRE)) { // wait }; *pUART_THR = c; } section ("L1_code") char UART_getc(void) { char c; while (!(*pUART_LSR & DR)) { } // read Data c = *pUART_RBR; return c; } section ("L1_code") void UART_init(int divisor) { // First of all, enable UART clock. *pUART_GCTL = UCEN; // Read period value and apply formula: divisor = period/16/8 // Write result to the two 8-bit DL registers (DLH:DLL). *pUART_LCR = DLAB; *pUART_DLL = divisor; *pUART_DLH = divisor>>8; // Clear DLAB again and set UART frame to 8 bits, no parity, 1 stop bit. // This may differ in other scenarious. *pUART_LCR = WLS(8); } void main() { int i; char *s = "BF532 Is Talking Press @ To continue"; char *s1 = "OK Continue Typing Bf532 Will respond"; //for the 9600 baud rate the divisor is: //Init_PLL(); i=0x0000af73; //i=0x1d3e; //i=UART_detectAutobaud(); //Init_SDRAM(); ////for Baudrate 57600--->0x1d3e; i = i >> 7; //divisor = 0xc0f; // UART_init writes the divisor to (DLH:DLL) UART_init(i); //Enable the UART Clocks *pUART_GCTL=0x0001; //Disable all the interrupts because we are //using polling approach *pUART_IER=0x0000; //Display the Divisor value for the perticular Baud rate i=0; while(s[i] != '\0') UART_putc(s[i++]); UART_putc('\n') ; UART_putc('\n') ; UART_putc('\r') ; while(1) if(UART_getc()=='@') break; i=0; while(s1[i] != '\0') UART_putc(s1[i++]); UART_putc('\n') ; UART_putc('\r') ; while(1) UART_putc(UART_getc()); }