Echo Generation Project Using TMS320C5505 DSP KIT

Echo Generation Project using TMS320C5505 DSP

Tags: INTERFACING AUDIO CODEC WITH TMS320C5505,echo generation using tms30c5505,audio echo generation c source code,,
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The Echo Generation project is implemented with Dsp TMS320C5505 hardware setup and software program in C code using Code Composer Studio. Whereas Audio echo generation are used wide range of application in audio signal Processing as well as in general DSP application. It is basic in audio siganl processing. To do one audio signal processing first we have to read audio files then applying algorithm then out to speaker.

The main feature of TI’s DSP processor C5505/15/35 portfolio contains some the industry’s lowest power 16-bit digital signal processors (DSPs) with speeds of up to 150MHz. End equipment using this line benefit from longer battery life, high peripheral integration, large on-chip memory, and overall reduced system costs. This brings very fast execution and implenting the algorithm in c code without changing the hardware setup.

The Main tools which we used are TYRO TMS320C5505 kit and Code Composer Studio v4.


The TMS320C5505 16 bit fixed point processor kit was used in this project to achieve a speed and accuracy. Their serial communication protocol I2C is used to interface the audio codec tlv320aic3204.

DSP TMS320C5505

The Digital Signal Processor TMS320C5505 of Texas Instrument is used for implementing the Tone Generation. TMS320C5505 is a Digital Signal Processor from the C5000 Platform and members of the TMS320C55x™ DSP generation, are highly integrated, high-performance solutions for demanding applications.

The TMS320C5505 EVALUATION BOARD is specially desgined for developers in dsp field as well as beginners. The kit is designed in such way that all the possible features of the DSP will be easily used by the everyone.

The kit supports in Code Composer Studio v4 and later, with XDS100 v1 USB Emulator which is done USB port.


Audio signal processing, sometimes referred to as audio processing, is the intentional alteration of auditory signals, or sound, often through an audio effect or effects unit.

As audio signals may be electronically represented in either digital or analog format, signal processing may occur in either domain. Analog processors operate directly on the electrical signal, while digital processors operate mathematically on the digital representation of that signal.

Audio signals are sound waves—longitudinal waves which travel through air, consisting of compressions and rarefactions. These audio signals are measured in bels or in decibels. Audio processing was necessary for early radio broadcasting, as there were many problems with studio to transmitter links.


"Analog" indicates something that is mathematically represented by a set of continuous values; for example, the analog clock uses constantly-moving hands on a physical clock face, where moving the hands directly alters the information that clock is providing.

Thus, an analog signal is one represented by a continuous stream of data, in this case along an electrical circuit in the form of voltage, current or charge changes (compare with digital signals below). Analog signal processing (ASP) then involves physically altering the continuous signal by changing the voltage or current or charge via various electrical means.

Historically, before the advent of widespread digital technology, ASP was the only method by which to manipulate a signal. Since that time, as computers and software became more advanced, digital signal processing has become the method of choice.


A digital representation expresses the pressure wave-form as a sequence of symbols, usually binary numbers. This permits signal processing using digital circuits such as microprocessors and computers.

Although such a conversion can be prone to loss, most modern audio systems use this approach as the techniques of digital signal processing are much more powerful and efficient than analog domain signal processing.


Processing methods and application areas include

  • Storage
  • Musical Tone Generation
  • Speech Recognition
  • level compression
  • Data compression
  • Transmission
  • Enhancement (e.g., equalization, filtering, noise cancellation, echo or reverb removal or addition, etc.)


The following two are playing a major role in our project:

  • TMS320C5505 KIT with audio codec TLV320AIC3204

The TYRO TMS320C5505 EVALUATION BOARD have one great advantage is audio codec tlv320aic3204 interfaced through I2C serial communication protocol. This interface will use to handle a audio signal IN and OUT through audio jack connector so it helping us to do Audio Signal Processing in this kit.

The Code Composer Studio v4 will help us to do the source code for TMS320C5505 to implement the Audio Loop Back project.



Figure: Interface TLV320AIC3204 with TMS320C5505

The above circuit diagram explains connections between the codec and processor.



The TLV320AIC3204 (sometimes referred to as the AIC3204) is a flexible, low-power, low-voltage stereo audio codec with programmable inputs and outputs, PowerTune capabilities, fixed predefined and parameterizable signal processing blocks, integrated PLL, integrated LDOs and flexible digital interfaces.

tlv320aic3204 block diagram

Extensive Register based control of power, input/output channel configuration, gains, effects,pin-multiplexing and clocks is included, allowing the device to be precisely targeted to its application.

Combined with the advanced PowerTune technology, the device can cover operations from 8 kHz mono voice playback to audio stereo 192kHz DAC playback, making it ideal for portable battery-powered audio and telephony applications.

The record path of the TLV320AIC3204 covers operations from 8kHz mono to 192kHz stereo recording, and contains programmable input channel configurations covering single-ended and differential setups, as well as floating or mixing input signals. It also includes a digitally-controlled stereo microphone preamplifier and integrated microphone bias. Digital signal processing blocks can remove audible noise that may be introduced by mechanical coupling, e.g. optical zooming in a digital camera.

The playback path offers signal-processing blocks for filtering and effects, and supports flexible mixing of DAC and analog input signals as well as programmable volume controls. The playback path contains two high-power output drivers as well as two fully-differential outputs. The high-power outputs can be configured in multiple ways, including stereo and mono BTL.

The integrated PowerTune technology allows the device to be tuned to just the right power-performance trade-off. When used in a docked environment power consumption typically is less of a concern, while minimizing noise is important. With PowerTune, the TLV320AIC3204 addresses both cases.

The voltage supply range for the TLV320AIC3204 for analog is 1.5V–1.95V, and for digital it is 1.26V–1.95V. To ease system-level design, LDOs are integrated to generate the appropriate analog or digital supply from input voltages ranging from 1.8V to 3.6V. Digital I/O voltages are supported in the range of 1.1V–3.6V.

The required internal clock of the TLV320AIC3204 can be derived from multiple sources, including the MCLK pin, the BCLK pin, the GPIO pin or the output of the internal PLL, where the input to the PLL again can be derived from the MCLK pin, the BCLK or GPIO pins. The PLL is highly programmable and can accept available input clocks in the range of 512kHz to 50MHz.


As per the chapter 4.1 the audio codec is connected with TMS320C5505 processor thorugh one of serial communication protocol i.e, I2C.

From the processor, we have to intialize the codec device by resetting and sending command to the slave device (TLV320AIC3204). After the TLV320AIC3204 is initialized through hardware reset at power-up or software reset, the internal memories is initialized to default values. This initialization takes place within 1ms after pulling the RESET signal high.

During this initialization phase no Register read or Register write operation should be performed on ADC or DAC coefficient buffers. Also, no block within the codec should be powered up during the initialization phase. The TLV320AIC3204 uses an external REF pin for decoupling the reference voltage used for the data converters and other analog blocks. REF pin requires a minimum 1uF decoupling capacitor from REF to AVss. In order for any analog block to be powered up, the Analog Reference block must be powered up.

By default, the Analog Reference block will implicitly be powered up whenever any analog block is powered up, or it can be powered up independently. During the time that the reference block is not completely powered up, subsequent requests for powering up analog blocks (e.g., PLL) are queued, and executed after the reference power up is complete.

Whenever the PLL is powered up, a startup delay of approx of 10ms is involved after the power up command of the PLL and before the clocks are available to the codec. This delay is to ensure stable operation of PLL and clock-divider logic.

Once you finished the device initialization procedure then the device is ready to communicate with processor. You can read values through ADC and process some algorithm and feed the digital values to DAC.

Reading the microphone or audio signal from audio system and feeding to ADC to get digitized value according to audio signal. According to our project we simply store the digital value without applying any algorithm as well as we out the values to DAC. Those digital signal will feed the DAC to produce the original inputted voice , after few seconds the stored samples will out to DAC 2 times. This is called the Audio Echo Generation.


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