Double Frequency Buck Converter

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Double Frequency Buck Converter

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Description

ABSTRACT

An increasing the switching frequency can improve the dynamics of power converters, but the efficiency may be degraded. Vary the efficiency and dynamics of power converters is a concerned in power electronics. This converter has two buck cells one works at high frequency and another works at low frequency. It works that current in the high-frequency switch is diverted through the low-frequency switch. The converter operates at very high frequency without adding control circuit’s .The switching loss of the converter remains small. This project is increased the steady state and transient response with low switching losses. Double frequency buck converter voltage is depends on the high frequency buck cell parameters, and is independent of the low-frequency buck cell parameters. This DF buck converter greatly improves the efficiency and exhibits nearly the same dynamics as the conventional high-frequency buck converter. This project can be extended to other dc–dc converters by the double frequency switch inductor and three terminal network structure.

DEMO VIDEO

EXISTING SYSTEM

The demand of high-performance power converter is increased dramatically with the broadening of power converter’s application fields. In order to improve the transient and steady state performance of power converters and to enhance power density, high switching frequency is an effective method. However, switching frequency rise causes higher switching losses and greater electromagnetic interference. This, in turn, limits the increase of switching frequency and hinders the improvement of system performance. Active and passive soft-switching techniques have been introduced to reduce switching losses. While these can create more favorable switching trajectories for active power devices, they will generally increase the complexity of control and sometimes are affected by the variable input and output condition.

PROPOSED SYSTEM

This paper proposes a novel converter topology to achieve high dynamic response and high efficiency of buck-type converters. This topology consists of a high-frequency buck cell and a low-frequency buck cell; and we call it the “double frequency buck converter” (DF buck). The current flowing through the high-frequency cell is diverted by the low frequency one, which also processes the majority of the converter power.This current decreases rapidly so that the high frequency cell can work at very high frequency to improve the dynamic response. Furthermore, the efficiency is enhanced due to the low-current processing requirement of the high frequency cell in the DF buck converter. Unlike the parallel structure, the proposed converter does not incur the circulating current problem. Moreover, it is not required to detect the load transient event for control. The circuit configuration and control strategy will be described in detail. The frequency domain and time-domain analyses are given to show that the proposed topology has the same transient and steady state performance with the single high-frequency buck converter.

BLOCK DIAGRAM

double frequency buck converter

HARDWARE & SOFTWARE REQUIREMENTS

HARDWARE

  • PIC microcontroller(PIC16F877A)
  • Driver Board

SOFTWARE

  • Matlab/Simulink

RESULT

double frequency buck converter

CONCLUSIONS

This project is used to improve the efficiency of conventional buck converter and also steady state transient response. The proposed converter does not need the load transient change information for accurate current control and does not have the current circulating problem. Extension to double-frequency switch-inductor three-terminal Network has also been described. Future work will investigate whether the proposed buck converter is applicable for high current or high dynamics specifications.

REFERENCES

[1] X. Zhou, P.-L. Wong, P. Xu, F. C. Lee, and A. Q. Huang, “Investigation of candidate VRM topologies for future microprocessors,” IEEE Trans.Power Electron., vol. 15, no. 6, pp. 1172–1182, Nov. 2000.

[2] U. Borup, F. Blaabjerg, and P. Enjeti, “Sharing of nonlinear load in parallel-connected three-phase converters,” IEEE Trans. Ind. Appl.,vol. 37, no. 6, pp. 1817–1823, Nov./Dec. 2001.

[3] H. Mao, F. C. Lee, D. Boroyevich, and S. Hiti, “Review of high performance three-phase power-factor correction circuit,” IEEE Trans.Ind. Appl., vol. 44, no. 4, pp. 437–446, Aug. 1997.

[4] H. Pollock and J. O. Flower, “New method of power control for series–parallel load-resonant converters maintaining zero-current switching and unity power factor operation,” IEEE Trans. Power Electron., vol. 12, no. 1, pp. 103–115, Jan. 1997.

[5] W. Chen and X. Ruan, “Zero-voltage-switching PWM hybrid full-bridge three-level converter with secondary-voltage clamping scheme,” IEEE Trans. Ind. Electron., vol. 55, no. 2, pp. 644–654, Feb. 2008.

[6] C. M. Wang, “New family of zero-current-switching PWM converters using a new zero-current-switching PWM auxiliary circuit,” IEEE Trans. Ind. Electron., vol. 53, no. 3, pp. 768–777, Jun. 2006.

[7] S. K. Mazumder, A. H. Nayfeh, and D. Boroyevich, “A novel approach to the control of parallel three-phase boost converters that combines space vector modulation with variable-structure control,” in Proc. IEEE APEC,2002, pp. 1031–1037.

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Additional information

Weight3.000000 kg

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