Design and Simulation of 1-Bit Sigma–Delta ADC Using tanner Tool

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1-Bit Sigma–Delta ADC Using tanner Tool
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Design and Simulation of 1-Bit Sigma–Delta ADC Using tanner Tool
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Abstract

This paper presents the design of a first order 1-bit sigma-delta oversampling analog-to-digital converter (ADC) which is realized using CMOS technology .Power consumption is the major issue in VLSI Design. In this paper an efficient low power first Order 1-bit Sigma-Delta ADC designed which accept input signal bandwidth of 10 KHz and a 5 MHz sampling clock frequency and implemented in a standard 0.18μm n-well CMOS process. The ADC operates at 2.5 reference voltage. The Simulation of design is done by using tanner EDA Simulation Software. This project firstly elaborate about ADC types and Classification among Nyquist rates and Oversampling ADCs. Further, design of 1-bit Sigma Delta ADC is to be proposed which consists of Opamp as a key component in Sigma delta ADC. Opamp at integrator stage is with the open loop voltage gain 10,530V/V, Gain Bandwidth (GB) is 5MHz, output resistance is 122.5KΩ, and power dissipation is 0.806 mW. Finally, a first order 1-bit Sigma Delta ADC is implemented using ±2.5 power supply and simulation results are plotted using tanner tool.

Introduction

A delta-sigma ADC first encodes an analog signal using high-frequency delta-sigma modulation, and then applies a digital filter to form a higher-resolution but lower sample-frequency digital output. The sigma delta ADC is now used in many applications where a low cost, low bandwidth, low power, high resolution ADC is required. ADCs typically have 16 to 24-bit resolution, with a usable input signal frequency range of a few Hz to a few kHz. The sigma delta DAC takes advantage of the speed of advanced IC processes to do a conversion as a series of approximations summed together. A sigma delta ADC contains very simple analog electronics such as comparator, voltage reference , a switch, and one or more integrators and summing circuits. The ADC uses the op-amp to design of integrator and comparator at an operating power supply of +2.5v. Sigma-delta ADC features a very low-resolution quantizer but operates with a sampling rate much higher than the Nyquist rate.  Two important techniques, called over sampling and quantization noise shaping, are being used in sigma-delta converters to trade the quantizer resolution with sampling rate. Oversampling refers to a sampling rate that is higher than the minimum required, which is the Nyquist rate. Usually power of 2 multiples of the Nyquist rates are being used

Tool Used

1.Tanner EDA

2.S-Edit

3.T-spice

4.W-Edit

5.LVS

Conclusion

The circuit design of first order sigma delta have been developed and implemented by using CMOS technology.

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