Design of Encoder / Decoder / Shift Register, implement on FPGA Kit using spartan 3 tyro

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VHDL code and implement on FPGA kit
 
Experiments Covered

  • Encode
  • Decoder
  • Shift register
Hardware - FPGASP3 Starter Kit

 

Encoder:

 

An encoder has 2n input lines and n output lines. The output lines generate a binary code corresponding to the input value. For example a single bit 4 to 2 encoder takes in 4 bits and outputs 2 bits. It is assumed. That there are only 4 types of input signals these are 0001, 0010, 0100 and 1000.

 

Logical Diagram



encoder


Truth Table

 


A3

A2

A1

A0

F1

F0

0

0

0

1

0

0

0

0

1

0

0

1

0

1

0

0

1

0

1

0

0

0

1

1

 
 

Encoder (Program for 4 x 2 Encoder using behavior descriptions)

 

Description

 


In this program an 8 x 1 encoder has 4- bit inputs and a 2- bit output. The output of the encoders depends on the level of the input line.

 
Flow Chart



encoder-flow-chart-of-tyro



        

 

 


            library IEEE;
       
            use IEEE.STD_LOGIC_1164.ALL;
       
            use IEEE.STD_LOGIC_ARITH.ALL;
       
            use IEEE.STD_LOGIC_UNSIGNED.ALL;
       
            entity first is
       
            port ( input : in std_logic_vector(3 downto 0);
       
                   output : out std_logic_vector(1 downto 0));
       
            end first;
       
            architecture Behavioral of first is
       
            begin
       
            process(input)
       
            begin
       
            case input is
       
            when "0001" =>
       
            output <= "00";
       
            when "0010" =>
       
            output <= "10";
       
            when "0100" =>
       
            output <= "01";
       
            when "1000" =>
       
            output <= "11";
       
            when others =>
       
            null;
       
            end case;
       
            end process;
       
            end Behavioral;

 

 
 
Decoder

A decoder is a device which does the reverse of an encoder undoing so that the original information can be retrieved. The same method used to encode is usually just reversed in order to decode. In digital electronics this would mean that a decoder is a multiple input, multiple output logic circuit that converts coded inputs into coded outputs where the input and output codes are different. E.g. n-to-2n


 
Logical Diagram



decoder


De-coder (Program for 2 x4 De-coder using behavior descriptions)

Description

In this program a 2 x 4 de-coder has 2- bit inputs and a 4- bit output. The output of the decoders depends on the level of the input line.


Flow Chart



de-coder-flow-chart-of-tyro


 

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity first is

port ( input : in std_logic_vector(1 downto 0);

output : out std_logic_vector(3 downto 0));

end first;

architecture Behavioral of first is

begin

process(input)

begin

case input is

when "00" =>

output <= "1110";

when "01" =>

output <= "1101";

when "10" =>

output <= "1011";

when "11" =>

output <= "0111";

when others =>

output <= "1111";

end case;

end process;

end Behavioral;

 

 


 
Shift register

Serial-in, serial-out shift registers delay data by one clock time for each stage. They will store a bit of data for each register. The data string is presented at 'Data In', and is shifted right one stage each time 'Data Advance' is brought high. At each advance, the bit on the far left (i.e. 'Data In') is shifted into the output. The bit on the far right (i.e. 'Data Out') is shifted out and lost.



shift-register-tyro


Data present th before clock time at D is transferred to Q

 

Shift Register (Program for 8-bit shifter using behavior descriptions)

 

Description

 

In this program a 8bit shift register has one control line (SW1) made switch ‘ON’ position to enable the shift register. Every negative edge clock pulses, 1-bit shifted alternatively to right side, output could verified by ‘LED interface card’.




shift-register-flow-chart-tyro