This SHARC Audio Development board has been designed to develop and test applications related to digital signal processing. The Board contains SHARC 21371 as the main CPU capable of performing highly intensive floating point computations. SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained high-speed computations
Key Features
Analog Devices ADSP-21371 processor
208-pin MQFP package.
Synchronous dynamic random access memory (SDRAM) 2M x 16-bit x 4 banks (16MB).
Flash memory 1M x 8-bit (1MB).
Serial peripheral interface (SPI) flash memory 2 Mbit.
Analog audio interface AD1835A codec.
4x2 RCA phono jack for 4 channels of stereo output.
3.5 mm stereo jack for 1 channel of stereo input.
3.5 mm headphone jack for 1 channel stereo output.
SPDIF Digital audio interface.
Coaxial digital input for receiving SPDIF data
Coaxial digital output for transmitting SPDIF data